Verilog Tutorial 3 - ModelSim - BCD Incrementor

Binary Coded Decimal (BCD) is a class of binary encoding of decimal numbers where each decimal digit is represented by a fixed number of bits, usually four or eight^[1]. BCD is also called "8421" encoding. This is the truth table of BCD encoding, where each decimal digits is represented by its corresponding 4-bit binary value:

For example, 168₁₀ (10101000₂) is represented as "0001 0110 1000" in BCD format. In this tutorial, I will implementing a digital circuit for adds 1 to a number in BCD format. The BCD format is three-digit decimal number (12-bit). For example, after incrementing, "0010 0101 1001" (259₁₀) becomes "0010 0110 0000" (260₁₀).

This is the top level schematic for three-digit BCD incrementor. This circuit is actually consist of three 4-bit incrementor module. 4-bit incrementor has input signal of BCD number and output signal of incremented BCD number. There is also a carry output signal that give indication when an incremented BCD number rollover (from 9₁₀ (1001₂) to 0₁₀ (0000₂)). In the three-digit incrementor circuit, this carry signal is used for give a signal to the next 4-bit incrementor module to increment the digit.

Verilog Tutorial 2 - ModelSim - Dual Priority Encoder

A priority encoder is a circuit or algorithm that compresses multiple binary inputs into a smaller number of outputs^[1]. In priority encoder, if two or more inputs are given at the same time, the input having the highest priority will take precedence. This is the four-request priority encoder truth table from FPGA Prototyping by Verilog Example book by Pong P. Chu.

You can learn the code implementation of that priority encoder from that book. In this tutorial, I will implement a dual priority encoder from suggested experiment on chapter 3 of this book. A dual priority encoder returns the code of the highest and second-highest priority request. The input is 12-bit signal and the outputs are the first and second priority codes, which are 4-bit binary codes of the highest and second-highest priority request.

Verilog Tutorial 1 - ModelSim - Multifunction Barrel Shifter

A barrel shifter is a digital circuit that can shift a data word by a specified number of bits without use of any sequential logic, only pure combinational logic^[1]. There are 3 type of bitwise shift operation: logical shift, arithmetic shift, and circular shift (rotate). We can shift the data to the left as well as to the right. The barrel shifter in this tutorial is a multifunction barrel shifter that can perform left or right circular shift. The basic barrel shifter in this tutorial is based on this book: FPGA Prototyping by Verilog Example by Pong P. Chu. You can also learn the basic of Verilog language from this book.

The multifunction barrel shifter in this tutorial is actually a suggested experiment from chapter 3 of the book. There are 2 design that will be implemented in this tutorial. The first design is using 1 rotate-left circuit, 1 rotate-right circuit, and one 2-to-1 multiplexer to select the desired result. The top level schematic of the first design is like this:

The second design is implemented using 1 rotate-left shifter with pre- and post- reversing circuit. The reversing circuit either pass the original input or reverses the input bitwise. For example, if the input is a7,a6,a5,a4,a3,a2,a1,a0 then the reversed result become a0,a1,a2,a3,a4,a5,a6,a7. The top level schematic of the second design is like this:

ARM Cortex-M3 (STM32F103) Tutorial - Incremental Rotary Encoder

Rotary encoder can be used for several application such as digital volume control, DC motor position sensor, etc. Rotary encoder is an electro-mechanical device that converts the angular position to an analog or digital code.

There are two type of rotary encoder: absolute and incremental. Absolute rotary encoder produce unique digital code for each distinct angle of the shaft. Incremental rotary encoder produce two square waves usually in quadrature output (channel A and B). The quadrature means that the output pulses of channel A and B are 90 degree out of phase.

ARM Cortex-M3 (STM32F103) Project - 16 Point FFT Audio Spectrum Analyzer

This project is the application of FFT algorithm from my previous post. I made an audio spectrum analyzer project using ARM Cortex-M3 (STM32F013C8) and LED matrix 8x8. I used 16 point FFT. 16 point FFT will produce 16 point frequency spectrum. I only display the frequency spectrum from index 1 to 8 on LED matrix 8x8. Index 0 of frequency spectrum (DC signal) is not displayed. Index 9 to 15 of frequency spectrum (symmetrical frequency) is also not displayed.

My audio sampling rate is 35.15kHz, but the frequency sampling of FFT sample is 35.15kHz/2=17.5kHz. So, the maximum frequency domain signals that can be displayed is up to 8.75kHz (Nyquist's theorem) and the resolution is 8.75kHz/8≈1kHz.

Complex DFT and FFT Algorithm Implementation Using C++ Programming Language

All four types of Fourier Transform family can be carried out with either real number or complex number. In my previous post, I shared how to implement real DFT algorithm using C++. In this post, I will implement the complex number version of DFT algorithm using C++. After that, I will also implement the Fast Fourier Transform (FFT) algorithm. FFT is another method for calculating the DFT. While it produces the same result as the DFT algorithm, it is incredibly more efficient, often reducing the computation time by hundreds. The algorithm that I use in this post is based on The Scientist and Engineer's Guide to Digital Signal Processing book. This book is very good for beginner to learn DSP.

The complex DFT transforms two N point time domain signals into two N point frequency domain signals. The two time domain signals are called the real part and the imaginary part, just as are the frequency domain signals. You can calculate the real DFT using complex DFT by move the N point signal into the real part of the complex DFT's time domain, then set all of the samples in the imaginary part to zero. Samples from 0 to N/2 of complex DFT correspond to the real DFT's spectrum.