Verilog Tutorial 5 - ModelSim - Simplified Floating Point and Signed Integer Conversion Circuit

The floating point format is utilized for representing a real number (number with a fractional component). Integer is a number without a fractional component. For example, 0, -2, and 168  are integers, while 12.25, 1/3, and π are real numbers.

In this tutorial, I have implemented a circuit for conversion between simplified floating point and signed integer number. The floating point format for this circuit is 13-bit like in the previous tutorial. The integer is in the 8-bit sign magnitude format. In the sign magnitude format, the MSB is a sign bit, while the other bits is the magnitude. For example, 10000001₂ is -1₁₀ and 00000001₂ is 1₁₀.

Verilog Tutorial 4 - ModelSim - Simplified Floating Point Greater Than Circuit

Real numbers in computer memory can be represented using fixed point or floating point format. For example, 12.25₁₀ in 8-bit fixed point format will be 1100.0100₂. Actually, in the register, the value is only 11000100₁₀. The radix point (binary point) is an implicit scaling factor which is 2^-4. This scaling factor is the same for all values of the same type, and does not change during computation. In floating point format, 12.25 will be represented as 1.225 * 10¹ (in decimal). Floating point format can be thought of as a kind of scientific notation. The scaling factor in the floating point format is not fixed and can change during computation, so the range in floating point format is much larger than signed integer format. Detailed explanation of fixed point and floating point format is beyond the scope of this tutorial.

In this tutorial, I have implemented a greater than circuit for simplified floating point number. This circuit compares two simplified floating point number and assert output, gt, only when the first number is larger than the second number. Floating point number in this circuit is not conform to the IEEE 754 standard, hence this format is called simplified floating number.

Verilog Tutorial 3 - ModelSim - BCD Incrementor

Binary Coded Decimal (BCD) is a class of binary encoding of decimal numbers where each decimal digit is represented by a fixed number of bits, usually four or eight^[1]. BCD is also called "8421" encoding. This is the truth table of BCD encoding, where each decimal digits is represented by its corresponding 4-bit binary value:

For example, 168₁₀ (10101000₂) is represented as "0001 0110 1000" in BCD format. In this tutorial, I will implementing a digital circuit for adds 1 to a number in BCD format. The BCD format is three-digit decimal number (12-bit). For example, after incrementing, "0010 0101 1001" (259₁₀) becomes "0010 0110 0000" (260₁₀).

This is the top level schematic for three-digit BCD incrementor. This circuit is actually consist of three 4-bit incrementor module. 4-bit incrementor has input signal of BCD number and output signal of incremented BCD number. There is also a carry output signal that give indication when an incremented BCD number rollover (from 9₁₀ (1001₂) to 0₁₀ (0000₂)). In the three-digit incrementor circuit, this carry signal is used for give a signal to the next 4-bit incrementor module to increment the digit.

Verilog Tutorial 2 - ModelSim - Dual Priority Encoder

A priority encoder is a circuit or algorithm that compresses multiple binary inputs into a smaller number of outputs^[1]. In priority encoder, if two or more inputs are given at the same time, the input having the highest priority will take precedence. This is the four-request priority encoder truth table from FPGA Prototyping by Verilog Example book by Pong P. Chu.

You can learn the code implementation of that priority encoder from that book. In this tutorial, I will implement a dual priority encoder from suggested experiment on chapter 3 of this book. A dual priority encoder returns the code of the highest and second-highest priority request. The input is 12-bit signal and the outputs are the first and second priority codes, which are 4-bit binary codes of the highest and second-highest priority request.

Verilog Tutorial 1 - ModelSim - Multifunction Barrel Shifter

A barrel shifter is a digital circuit that can shift a data word by a specified number of bits without use of any sequential logic, only pure combinational logic^[1]. There are 3 type of bitwise shift operation: logical shift, arithmetic shift, and circular shift (rotate). We can shift the data to the left as well as to the right. The barrel shifter in this tutorial is a multifunction barrel shifter that can perform left or right circular shift. The basic barrel shifter in this tutorial is based on this book: FPGA Prototyping by Verilog Example by Pong P. Chu. You can also learn the basic of Verilog language from this book.

The multifunction barrel shifter in this tutorial is actually a suggested experiment from chapter 3 of the book. There are 2 design that will be implemented in this tutorial. The first design is using 1 rotate-left circuit, 1 rotate-right circuit, and one 2-to-1 multiplexer to select the desired result. The top level schematic of the first design is like this:

The second design is implemented using 1 rotate-left shifter with pre- and post- reversing circuit. The reversing circuit either pass the original input or reverses the input bitwise. For example, if the input is a7,a6,a5,a4,a3,a2,a1,a0 then the reversed result become a0,a1,a2,a3,a4,a5,a6,a7. The top level schematic of the second design is like this:

VHDL Tutorial - Xilinx ISE - Make A New Project for Digital Circuits Simulation

In this article, I will share about HDL (Hardware Description Language) and Xilinx ISE simulator. HDL is used for design digital circuits. There are 2 type of HDL that commonly used, VHDL and Verilog. VHDL syntax is like Pascal language, while Verilog is like C language. HDL has differences with traditional programming language such as Pascal and C. In traditional programming language, all statements always executed sequentially. In HDL, there are statements that can be executed concurrently. HDL can be used for designing a digital ASIC or programming an FPGA.

FPGA (Field Programmable Gate Array) is consists of many basic digital circuit blocks. This circuit block is usually called LUT. FPGA can be used for implement flexible digital circuits, because FPGA is like microcontroller that can be programmed using a hardware programmer. On a FPGA, we can create any digital circuits from basic combinational circuits such as adder, decoder, multiplexer up to a complex system like a microcontroller. We can create a full function microcontroller such as AVR ATmega inside a FPGA. FPGA is also used for simulation when prototyping a digital IC before go to the custom ASIC development process. There are 2 commonly used FPGA, Altera and Xilinx. These FPGA has an IDE, for Altera is Altera Quartus and for Xilinx is Xilinx ISE.

ASIC (Application Specific Integrated Circuit) is an IC that has a specific function (not flexible like FPGA). ASIC can be an analog, digital, mixed-signal, or RF IC. The process of creating an ASIC is quite complex. The process is begin from the design, synthesis, routing, fabrication, and testing. This complete and detail process can be learned from microelectronics lecture. For your information, there are several software used for design ASIC such as Synopsys, MentorGraphics, and Cadence. These software are called EDA (Electronic Design Automation) software.